Senior Analog Layout Design Engineer

Job description

Responsibilities: 

• Analog Mixed-Signal layout and verification for next generation high-speed analog circuits
• Candidate should be able to work on chip level floor-plan with limited supervision

Qualifications / Requirements:

• BSEE/BTECH required, MSEE/MTECH preferred or extensive background in layout of
  high-performance analog circuits
• Must have direct design or layout experience in at least one of the following areas:
  • Nyquist Rate ADC’s
  • Sigma-Delta ADC
  • DAC
  • Line drivers
  • Analog Filters
  • Programmable Gain Amplifiers
  • High-performance Analog Phase locked loops
  • High-speed SERDES
• Familiarity with Cadence and Mentor CAD tools is required, preferably familiar with Cadence
  Virtuoso, Composer, and verifications tools including Assura, Mentor Calibre LVS, DRC, XRC engines for
  verification
• Knowledge of working of basic analog building blocks such as op-amps, comparators, etc... is a plus
• Excellent communication skills